Title
VLSI design and verification of the Imagine processor
Abstract
The Imagine stream processor is a 21 million transistor chip implemented by a collaboration between Stanford University and Texas Instruments in a 1.5 V 0.15 μm process with five layers of aluminum metal. The VLSI design, clocking, and verification methodologies for the Imagine processor are presented. These methodologies enabled a small team of graduate students with limited resources to design a high-performance media processor in a modern ASIC flow.
Year
DOI
Venue
2002
10.1109/ICCD.2002.1106784
ICCD
Keywords
Field
DocType
million transistor chip,imagine stream processor,0.15 micron,stanford unversity,limited resource,aluminum metal,texas instruments,stanford university,vlsi design,1.5 v,vlsi verification,al metal layers,digital signal processing chips,stream processor,vlsi,transistor chip,integrated circuit design,high-performance media processor,graduate student,asic flow,m process,vlsi clocking,design methodology,media processor,chip,very large scale integration,collaboration,logic design,aluminum,application specific integrated circuits
Logic synthesis,Media processor,Computer science,Parallel computing,Design methods,Chip,Application-specific integrated circuit,Integrated circuit design,Stream processing,Very-large-scale integration
Conference
ISSN
ISBN
Citations 
1063-6404
0-7695-1700-5
17
PageRank 
References 
Authors
1.10
4
6
Name
Order
Citations
PageRank
Brucek Khailany11187118.43
William J. Dally2117821460.14
andrew chang3171.10
ujval j kapasi4528.87
jinyung namkoong515824.15
Brian Towles62564195.45