Title
Fences in weak memory models (extended version)
Abstract
We present a class of relaxed memory models, defined in Coq, parameterised by the chosen permitted local reorderings of reads and writes, and by the visibility of inter- and intra-processor communications through memory (e.g. store atomicity relaxation). We prove results on the required behaviour and placement of memory fences to restore a given model (such as Sequential Consistency) from a weaker one. Based on this class of models we develop a tool, diy, that systematically and automatically generates and runs litmus tests. These tests can be used to explore the behaviour of processor implementations and the behaviour of models, and hence to compare the two against each other. We detail the results of experiments on Power and a model we base on them.
Year
DOI
Venue
2012
10.1007/s10703-011-0135-z
Formal Methods in System Design
Keywords
Field
DocType
Weak memory models,Formal proofs,Testing tool,PowerPC,Generic framework,Fences
Atomicity,Visibility,Programming language,Sequential consistency,Computer science,Litmus,Implementation,Theoretical computer science,PowerPC
Journal
Volume
Issue
ISSN
40
2
0925-9856
Citations 
PageRank 
References 
20
0.93
19
Authors
4
Name
Order
Citations
PageRank
Jade Alglave160826.53
Luc Maranget280849.83
Susmit Sarkar374430.76
Peter Sewell4144668.16