Name
Title | ||
|---|---|---|
ATPG Heuristics Dependant Observation Point Insertion for Enhanced Compaction and Data Volume Reduction |
Abstract | ||
|---|---|---|
As digital circuits grow in gate count so does the data volume required for manufacturing test. To address this problem several test compression techniques have been developed. This paper presents a novel and scalable technique for inserting observation points to aid compression by reducing pattern count and data volume. Experimental results presented for industrial circuits demonstrate the effectiveness of the method. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1109/DFT.2008.39 | Boston, MA |
Keywords | Field | DocType |
scalable technique,test compression technique,enhanced compaction,digital circuit,point insertion,pattern count,atpg heuristics dependant observation,observation point,industrial circuit,data volume reduction,gate count,data volume,automatic test pattern generation,iron,compaction,digital circuits,logic gates,databases,atpg,test compression | Automatic test pattern generation,Logic gate,Digital electronics,Gate count,Computer science,Algorithm,Electronic engineering,Heuristics,Electronic circuit,Test compression,Scalability | Conference |
ISSN | ISBN | Citations |
1550-5774 | 978-0-7695-3365-0 | 9 |
PageRank | References | Authors |
0.52 | 13 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Santiago Remersaro | 1 | 208 | 7.95 |
| Janusz Rajski | 2 | 2460 | 201.28 |
| Thomas Rinderknecht | 3 | 142 | 10.39 |
| Sudhakar M. Reddy | 4 | 5747 | 699.51 |
| Irith Pomeranz | 5 | 3829 | 336.84 |