Title
Coordinator-master-worker model for efficient large scale network simulation
Abstract
In this work, we propose a coordinator-master-worker (CMW) model for medium to extra-large scale network simulation. The model supports distributed and parallel simulation for a heterogeneous computing node architecture with both multi-core CPUs and GPUs. The model aims at maximizing the hardware usage rate while reducing the overall management overhead. In the CMW model, the coordinator is the toplevel simulation CPU process that performs an initial partitioning of the simulation into multiple instances and is responsible for load balancing and synchronization services among all the active masters. The master is also a CPU process and provides event scheduling, synchronization, and communication services to the workers. It manages workers operating potentially on different computing resources within the same shared memory context and communicates with the coordinator and others masters through the messages passing interface. The worker is the elementary actor of CMW model that performs the simulation routines and interacts with the input and output data, and can be a CPU or a GPU thread. Compared to existing master-worker models, the CMW is natively parallel and GPU compliant, and can be extended to support additional computing resources. The performance gain of the model is evaluated through different benchmarking scenarios using low-cost publicly available GPU platforms. The results have been shown that the speedup up to 3000 times can be achieved compared to a sequential execution and up to 6 times compared to a mono-GPU MW-based simulation. The hardware activities rate of the CMW services for both CPU and GPU are analyzed in detail.
Year
Venue
Keywords
2013
SIMUTools
cmw model,coordinator-master-worker model,simulation routine,gpu compliant,scale network simulation,toplevel simulation cpu process,cmw service,master-worker model,cpu process,parallel simulation,efficient large scale network,mono-gpu mw-based simulation,gpgpu,system architecture,heterogeneous computing
Field
DocType
Citations 
Event scheduling,Shared memory,Computer science,Load balancing (computing),Symmetric multiprocessor system,Computer network,Network simulation,Real-time computing,Input/output,General-purpose computing on graphics processing units,Operating system,Speedup
Conference
2
PageRank 
References 
Authors
0.36
16
3
Name
Order
Citations
PageRank
Bilel Ben Romdhanne182.39
Navid Nikaein285878.83
Christian Bonnet389968.13