Title
Area-Efficient Reed-Solomon Decoder Design For 10-100 Gb/S Applications
Abstract
With the extensive applications in high-speed communication systems, the current high-throughput Reed-Solomon decoders are required to achieve the target data rates from 10 Gb/s to 100 Gb/s with low hardware complexity. In this paper, pipeline interleaving inversionless Berlekamp-Massey (PI-iBM) algorithm and pipeline interleaving reformulated inversionless Berlekamp-Massey (PI-RiBM) algorithms for decoding Reed-Solomon codes are presented. Based on these two new algorithms PI-iBM and PI-RiBM Reed-Solomon decoders targeted at 10-100 Gb/s applications are developed. Compared with previously published works, the proposed designs can achieve very high throughput with relatively low hardware complexity. Thus they are well suited for modern high data rate communication systems.
Year
DOI
Venue
2009
10.1109/ISCAS.2009.5118354
ISCAS: 2009 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS 1-5
Keywords
Field
DocType
hardware,registers,throughput,high throughput,polynomials,pipelines,reed solomon,communication system,reed solomon code,decoding,computer architecture
Hardware complexity,Computer science,Parallel computing,Communications system,Electronic engineering,Data rate,Throughput,Decoding methods,Reed solomon decoder,Interleaving
Conference
Volume
Issue
Citations 
null
null
1
PageRank 
References 
Authors
0.37
9
4
Name
Order
Citations
PageRank
Bo Yuan161.78
Li Li223535.19
Jin Sha318921.12
Zhongfeng Wang4354.74