Name
Abstract | ||
|---|---|---|
As part of an effort to accelerate server TCP/IP networking, Intel R&D has developed a software prototype that uses one of the intel xeon processors in a multiprocessor server as a packet processing engine (PPE). This prototype serves as a vehicle for empirical measurement and analysis of a highly programmable PPE that is closely tied to the server's core CPU and memory complex. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/MM.2004.1268989 | international symposium on microarchitecture |
Keywords | DocType | Volume |
empirical measurement,server tcp,programmable ppe,intel xeon processor,memory complex,ip network,software prototype,intel r,multiprocessor server,packet processing engine,core cpu,software architecture,process engineering,data gathering,operating system | Conference | 24 |
Issue | ISSN | Citations |
1 | 0272-1732 | 26 |
PageRank | References | Authors |
2.23 | 5 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Greg Regnier | 1 | 258 | 22.77 |
| david b minturn | 2 | 107 | 8.49 |
| Gary McAlpine | 3 | 197 | 19.21 |
| Vikram A. Saletore | 4 | 125 | 15.17 |
| Foong, A.P. | 5 | 185 | 14.14 |