Paper Info
Title
Design and Implementation of High Performance Viterbi Decoder for Mobile Communication Data Security.
Abstract
With the ever increasing growth of data communication in the field of e-commerce transactions and mobile communication data security has gained utmost importance. However the conflicting requirements of power, area and throughput of such applications make hardware cryptography an ideal choice. Dedicated hardware devices such as FPGAs can run encryption routines concurrently with the host computer which runs other applications. The use of error correcting code has proven to be are effective way to overcome data corruption in digital communication channel. In this paper, we describe the design and implementation of a reduced complexity decode approach along with minimum power dissipation FPGAs for Mobile Communication data security.
Year
DOI
Venue
2009
10.1007/978-3-642-04091-7_9
COMPUTATIONAL INTELLIGENCE IN SECURITY FOR INFORMATION SYSTEMS
Keywords
Field
DocType
Data security,FPGA,Hardware Cryptography,Viterbi algorithm
Data security,Computer science,Cryptography,Encryption,Viterbi decoder,Data Corruption,Soft-decision decoder,Throughput,Mobile telephony,Embedded system
Conference
Volume
ISSN
Citations 
63
1867-5662
0
PageRank 
References 
Authors
0.34
2
2
Name
Order
Citations
PageRank
T. Menakadevi130.80
M. Madheswaran210215.57