Name
Abstract | ||
|---|---|---|
The main focus of this paper is on the architectural and implementation issues of a prototype of a low-level image segmentation architecture (LISA). LISA performs real-time (20 Mpixels/sec) gray-level image segmentation, i.e., assignment of image pixels to a few user-selected classes. A decision-theoretic pattern-recognition approach is used, which is divided into a feature extraction part and a decision analysis part. The feature extraction part is based on extracting local and global descriptions for all of the image pixels. In the decision analysis part we designed a novel no-cross-term classifier, which significantly reduced the hardware complexity. The LISA prototype has been built with custom and off-the-shelf VLSI chips. Some measured results will also be reported. |
Year | DOI | Venue |
|---|---|---|
1993 | 10.1007/BF01212296 | Mach. Vis. Appl. |
Keywords | DocType | Volume |
Real-time image processing,Image segmentation,Pixel classification,VLSI | Journal | 6 |
Issue | Citations | PageRank |
4 | 2 | 0.45 |
References | Authors | |
4 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| W. E. Blanz | 1 | 23 | 9.83 |
| C. B. Shung | 2 | 83 | 9.59 |
| C. E. Cox | 3 | 2 | 0.45 |
| W. Greiner | 4 | 2 | 0.45 |
| Byron Dom | 5 | 2600 | 825.93 |
| Dragutin Petkovic | 6 | 610 | 93.80 |