Name
Abstract | ||
|---|---|---|
The Cray X1 supercomputer's distributed shared memory presents a 64-bit global address space that is directly addressable from every MSP with an interconnect bandwidth per computation rate of 1 byte/flop. Our results show that this high bandwidth and low latency for remote memory accesses translate into improved application performance on important applications. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/MM.2005.20 | Hot Interconnects |
Keywords | DocType | Volume |
shared-memory architecture,cray x1 supercomputer,remote memory access,low latency,important application,memory vector multiprocessor,memory architecture,64-bit global address space,computation rate,high bandwidth,appropriate model,performance evaluation,eulerian gyrokinetic-maxwell solver,cray shmem api,improved application performance,unified parallel c,remote memory accesses translates,64-bit operation,programming model,distributed shared memory,floating point | Conference | 25 |
Issue | ISSN | ISBN |
1 | 0272-1732 | 0-7803-8686-8 |
Citations | PageRank | References |
12 | 1.80 | 3 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Thomas H. Dunigan Jr. | 1 | 12 | 1.80 |
| Vetter, Jeffrey | 2 | 2383 | 186.44 |
| James B. White III | 3 | 79 | 15.09 |
| Patrick H. Worley | 4 | 488 | 101.02 |
| Dunigan, T.H., Jr. | 5 | 12 | 1.80 |
| White, J.B., III | 6 | 12 | 1.80 |