Name
Abstract | ||
|---|---|---|
This work presents an architectural solution for the IEEE 802.11a MAC layer on-chip implementation. The complete implementation flow is presented as well as some unique solutions implemented using an architecture that exploits dedicated hardware for timing critical tasks. The system is completely integrated into a single chip and the implementation results are presented. |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/DSD.2003.1231962 | Belek-Antalya, Turkey |
Keywords | Field | DocType |
system-on-chip implementation,mac layer,assome unique solution,thecomplete implementation flow,architectural solution,mac layer on-chip implementation,critical task,single chip andthe implementation,logic simulation,chip,system on chip,integrated circuit design | IEEE 802.11a-1999,Architecture,Computer architecture,Media access control,System on a chip,Computer science,Network on a chip,Real-time computing,Chip,Logic simulation,Integrated circuit design,Embedded system | Conference |
ISBN | Citations | PageRank |
0-7695-2003-0 | 13 | 1.15 |
References | Authors | |
1 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Goran Panic | 1 | 39 | 8.89 |
| Daniel Dietterle | 2 | 42 | 5.85 |
| Zoran Stamenkovic | 3 | 51 | 12.08 |
| Klaus Tittelbach-Helmrich | 4 | 43 | 7.35 |