Paper Info
Title
Cache efficiency and scalability on multi-core architectures
Abstract
Two electrical engineering applications from industry partners dealing with sparse matrices were analyzed regarding cache efficiency and scalability on modern multi core systems. Two different contemporary multi-core architectures have been investigated, namely Intel's Westmere and AMD's Magny-Cours. This paper can be regarded as a continuation of the investigations presented in [14] and [15]. In addition, the SuiteSparseQR library for efficiently computing QR factorizations of sparse matrices was evaluated regarding scalability and cache efficiency.
Year
DOI
Venue
2011
10.1007/978-3-642-23178-0_8
PACT
Keywords
Field
DocType
modern multi core system,sparse matrix,qr factorization,electrical engineering application,industry partner,different contemporary multi-core architecture,suitesparseqr library,cache efficiency,amdahl s law,multi core
Cache,Computer science,Amdahl's law,Parallel computing,Continuation,Cache algorithms,Smart Cache,Multi-core processor,Sparse matrix,Scalability
Conference
Volume
ISSN
Citations 
6873
0302-9743
0
PageRank 
References 
Authors
0.34
7
3
Name
Order
Citations
PageRank
Thomas Müller100.34
Carsten Trinitis215129.80
Jasmin Smajic372.13