Name
Abstract | ||
|---|---|---|
I. O'Connor et al. have proposed a dynamically reconfigurable dynamic logic circuit (DRDLC) to generate some logic functions by using the double-gate (DG) carbon nanotube (CNT) FETs which have the ambipolar property [1]. This DRDLC consists of seven transistors to generate 14 logic functions which do not include the XOR and XNOR functions. On the other hand, K. Jabeur eta!, have proposed a DRDLC to generate the whole set of 16 logic functions including XOR and XNOR by adding 4 or 8 transistors to O'Connor's circuit [5]. In this letter, we propose a DRDLC, which consists of only seven transistors, to generate the whole set of 16 logic functions by using DG-CNTFETs. Finally, we show that the number of transistors can be reduced compared to the conventional DRDLC to generate 16 logic functions. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1587/transfun.E96.A.1642 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | Field | DocType |
reconfigurable logic circuit, ambipolar double-gate devices, dynamic logic, CNTFETs | Logic gate,Pass transistor logic,Circuit design,Theoretical computer science,Resistor–transistor logic,Logic family,Register-transfer level,Dynamic logic (digital electronics),Electrical engineering,Mathematics,Programmable logic device | Journal |
Volume | Issue | ISSN |
E96A | 7 | 0916-8508 |
Citations | PageRank | References |
1 | 0.40 | 3 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Manabu Kobayashi | 1 | 11 | 7.44 |
| Hiroshi Ninomiya | 2 | 7 | 5.20 |
| Shigeyoshi Watanabe | 3 | 15 | 7.42 |