Name
Abstract | ||
|---|---|---|
This paper presents a compiler strategy to optimize data accesses in regular array-intensive applications running on embedded multiprocessor environments. Specifically, we propose an optimization algorithm that targets at reducing extra off-chip memory accesses caused by interprocessor communication. This is achieved by increasing the application-wide reuse of data that resides in scratch-pad memories of processors. Our results obtained using four array-intensive image processing applications indicate that exploiting interprocessor data sharing can reduce energy-delay product significantly on a four-processor embedded system. |
Year | DOI | Venue |
|---|---|---|
2004 | 10.1109/TVLSI.2004.824299 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
image processing,embedded systems,system on a chip,compiler,embedded system,scanning probe microscopy | System on a chip,Reuse,Computer science,Data sharing,Parallel computing,Image processing,Multiprocessing,Compiler,Integrated circuit,Embedded system,Low-power electronics | Journal |
Volume | Issue | ISSN |
12 | 3 | 1063-8210 |
Citations | PageRank | References |
21 | 0.89 | 12 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mahmut T. Kandemir | 1 | 7371 | 568.54 |
| Ismail Kadayif | 2 | 611 | 45.50 |
| Alok N. Choudhary | 3 | 242 | 22.44 |
| Ibrahim Kolcu | 4 | 270 | 20.83 |