Abstract | ||
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Editor's note:As the complexity of power and ground networks increases, methods for efficient analysis and aggressive optimization of these networks become essential. Here, the authors describe efficient hierarchical methods for analyzing distribution networks. To optimize the networks, the authors call for techniques that reduce noise on the power grid, including topology selection, wire widening, and decoupling-capacitance insertion, combined with supply, signal, and clock network codesign.ýSoha Hassoun, Tufts University |
Year | DOI | Venue |
---|---|---|
2003 | 10.1109/MDT.2003.1198680 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
decoupling-capacitance insertion,efficient hierarchical method,power grids,aggressive optimization,ground networks increase,tufts university,power grid,distribution network,soha hassoun,clock network codesign,efficient analysis,integrated circuit layout,network topology,integrated circuit design | Integrated circuit layout,Noise reduction,Clock network,Computer science,Distribution networks,Network topology,Electronic engineering,Power grid,Integrated circuit design,Floorplan | Journal |
Volume | Issue | ISSN |
20 | 3 | 0740-7475 |
Citations | PageRank | References |
25 | 1.58 | 18 |
Authors | ||
2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Sachin Sapatnekar | 1 | 4074 | 361.60 |
Haihua Su | 2 | 405 | 27.32 |