Name
Abstract | ||
|---|---|---|
Serial link interconnection has generated a lot of attention in on-chip bus design due to its advantages over multibit parallel interconnection in terms of crosstalk, skew, and area cost. However, serializing a multi-bit parallel bus tends to increase the bit transition and power dissipation. This paper proposes an embedded transition inversion (ETI) coding scheme that uses the phase difference between the clock and data in the transmitted serial data to address the problem of the extra indication bit. This ETI coding scheme reduces the transition by up to 31% compared with the encoding followed by serial (ES) scheme. The analysis and simulation results, in this study indicate that the proposed coding scheme produces a low bit transition for different kinds of data pattern. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1109/SiPS.2011.6088957 | SiPS |
Keywords | Field | DocType |
integrated circuit interconnections,low power serial link,on-chip bus design,power dissipation,multibit parallel interconnection,multibit parallel bus,low-power electronics,encoding,data pattern,system-on-chip,system buses,crosstalk,clocks,eti coding scheme,system-on-chip devices,phase difference,serial link interconnection,embedded transition inversion coding scheme,detectors,system on chip,system on a chip,low power electronics,mobile communication,simulation | Serial communication,System on a chip,Serialization,Computer science,Parallel computing,Coding (social sciences),Real-time computing,Skew,Interconnection,Encoding (memory),Low-power electronics | Conference |
ISSN | ISBN | Citations |
2162-3562 | 978-1-4577-1920-2 | 3 |
PageRank | References | Authors |
0.41 | 3 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Wen-Chih Huang | 1 | 96 | 7.10 |
| Chih-Hsing Lin | 2 | 72 | 8.50 |
| Ching-Te Chiu | 3 | 304 | 38.60 |