Name
Title | ||
|---|---|---|
Acceleration Techniques of Multiple Fault Test Generation Using Vector Pair Analysis. |
Year | Venue | Keywords |
|---|---|---|
1995 | IEICE Transactions | combinational circuit |
Field | DocType | Volume |
Stuck-at fault,Automatic test pattern generation,Computer science,Algorithm,Combinational logic,Acceleration | Journal | 78-D |
Issue | Citations | PageRank |
7 | 1 | 0.42 |
References | Authors | |
0 | 4 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Seiji Kajihara | 1 | 989 | 73.60 |
| Rikiya Nishigaya | 2 | 1 | 0.76 |
| Tetsuji Sumioka | 3 | 5 | 0.91 |
| Kozo Kinoshita | 4 | 756 | 118.08 |