Name
Abstract | ||
|---|---|---|
The authors propose a four-quadrant multiplier based on a core cell that exploits the general relationship between the saturation current of an MOS transistor and the source inversion charge density, valid from weak to strong inversion. The advantages of the proposed circuit are simplicity, low distortion and feasibility of low-voltage operation. Experimental results in a 0.35 mum CMOS prototype i... |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1049/iet-cds.2008.0287 | IET Circuits, Devices & Systems |
Keywords | Field | DocType |
analogue multipliers,CMOS analogue integrated circuits,low-power electronics,MOSFET | Saturation current,Multiplier (economics),Electronic engineering,CMOS,Low voltage,Transistor,MOSFET,Electrical engineering,Distortion,Mathematics,Low-power electronics | Journal |
Volume | Issue | ISSN |
3 | 5 | 1751-858X |
Citations | PageRank | References |
2 | 0.56 | 3 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| M. B. Machado | 1 | 2 | 0.56 |
| A. I. A. Cunha | 2 | 5 | 2.48 |
| L. A. de Lacerda | 3 | 2 | 0.56 |
| C. Galup-Montoro | 4 | 41 | 8.21 |
| M. C. Schneider | 5 | 75 | 14.58 |