Paper Info
Title
MaRS: a macro-pipelined reconfigurable system
Abstract
We introduce MaRS, a reconfigurable, parallel computing engine with special emphasis on scalability, lending itself to the computation-/data-intensive multimedia data processing and wireless communication. Global communication between the processing elements (PEs) in MaRS is performed through a 2D-mesh deadlock-free network, avoiding any concerns due to non-scalable bus-based communication. Additionally, we have developed a second layer of inter-PE connection realized by distributed shared register files and conditional operands, to enhance the performance of MaRS for those applications demanding a tightly coupled PE array. We have modeled and verified a major part of MaRS. The promising results of our preliminary analyses show that MaRS can efficiently be tailored to different applications offering flexible data communication, and high performance.
Year
DOI
Venue
2004
10.1145/977091.977141
Conf. Computing Frontiers
Keywords
Field
DocType
macro-pipelined reconfigurable system,wireless communication,deadlock-free network,flexible data communication,pe array,high performance,data-intensive multimedia data processing,global communication,conditional operands,processing element,bus-based communication,computer graphic,mesh network,computer graphics,mimd,parallel computer,multimedia,register file
Mars Exploration Program,Data processing,Wireless,Computer science,Operand,Parallel computing,Real-time computing,Macro,Computer graphics,Scalability,MIMD,Embedded system
Conference
ISBN
Citations 
PageRank 
1-58113-741-9
7
0.64
References 
Authors
17
4
Name
Order
Citations
PageRank
Nozar Tabrizi1294.11
Nader Bagherzadeh21674182.54
Amir H. Kamalizad3262.32
Haitao Du4556.88