Name
Title | ||
|---|---|---|
Design of a high-speed RSA encryption processor based on the residue table for redundant binary numbers |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1002/scj.1122 | Systems and Computers in Japan |
Field | DocType | Volume |
Arithmetic circuits,Page layout,Computer science,Parallel computing,Cryptosystem,Encryption,Chip size,Key size,Binary number | Journal | 33 |
Issue | Citations | PageRank |
5 | 5 | 0.49 |
References | Authors | |
2 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Nobuhiro Tomabechi | 1 | 10 | 4.31 |
| Teruki Ito | 2 | 5 | 0.49 |