Name
Abstract | ||
|---|---|---|
Today, signals being transmitted on and off chip have frequency spectra extending to 10 GHz and beyond. The parasitic impedance associated with the package and ESD protection circuit can distort a signal and must be carefully managed. An overview of methods for parasitic impedance mitigation and co-design is provided. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1109/CICC.2009.5280774 | PROCEEDINGS OF THE IEEE 2009 CUSTOM INTEGRATED CIRCUITS CONFERENCE |
Keywords | Field | DocType |
ESD, IO | Transmission (telecommunications),Inductance,Capacitance,Computer science,Electrostatic discharge,Integrated circuit packaging,Electrical impedance,Electronic engineering,Chip,Integrated circuit design,Electrical engineering | Conference |
Citations | PageRank | References |
0 | 0.34 | 1 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Elyse Rosenbaum | 1 | 61 | 21.99 |
| Hyeon-min Bae | 2 | 91 | 20.77 |
| Karan S. Bhatia | 3 | 1 | 1.03 |
| Adam C. Faust | 4 | 9 | 1.49 |