Name
Title | ||
|---|---|---|
A Calibrated Phase/Frequency Detector for Reference Spur Reduction in Charge-Pump PLLs. |
Abstract | ||
|---|---|---|
This brief presents a new technique for minimizing reference spurs in a charge-pump phase-locked loop (PLL) while maintaining dead-zone-free operation. The proposed circuitry uses a phase/frequency detector with a variable delay element in its reset path, with the delay length controlled by feedback from the charge-pump. Simulations have been performed with several PLLs to compare the proposed cir... |
Year | DOI | Venue |
|---|---|---|
2006 | 10.1109/TCSII.2006.880030 | IEEE Transactions on Circuits and Systems II: Express Briefs |
Keywords | Field | DocType |
Phase detection,Phase frequency detector,Charge pumps,Phase locked loops,Voltage-controlled oscillators,Delay,Flip-flops,Circuit simulation,Voltage control,Digital systems | Phase-locked loop,Phase detector characteristic,Control theory,PLL multibit,Voltage-controlled oscillator,Electronic engineering,Charge pump,Phase detector,Detector,Mathematics,Phase frequency detector | Journal |
Volume | Issue | ISSN |
53 | 9 | 1549-7747 |
Citations | PageRank | References |
20 | 1.51 | 2 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| C. T. Charles | 1 | 20 | 1.51 |
| D. J. Allstot | 2 | 389 | 76.58 |