Name
Title | ||
|---|---|---|
Dynamic Power Minimization During Combinational Circuit Testing As A Traveling Salesman Problem |
Abstract | ||
|---|---|---|
Testing of VLSI circuits can cause generation of excessive heat which can damage the chips under test. In the random testing environment, high-performance CMOS circuits consume significant dynamic power during testing because of enhanced switching activity in the internal nodes. Our work focuses on the fact that power minimization is a Traveling Salesman Problem (TSP). We explore application of local search and genetic algorithms to test set reordering and perform a quantitative comparison to previously used deterministic techniques. We also consider reduction of the original test set as a dual-objective optimization problem, where switching activity and fault coverage are the two objective functions. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/CEC.2005.1554812 | 2005 IEEE CONGRESS ON EVOLUTIONARY COMPUTATION, VOLS 1-3, PROCEEDINGS |
Keywords | Field | DocType |
combinational circuit, testing, test vector, automatic test pattern generator (ATPG), fault coverage, traveling salesman problem (TSP), genetic algorithm application, weight-biased edge crossover, multi-objective genetic algorithm | Bottleneck traveling salesman problem,Mathematical optimization,Random testing,Fault coverage,Computer science,Travelling salesman problem,Local search (optimization),2-opt,Optimization problem,Test set | Conference |
Citations | PageRank | References |
2 | 0.41 | 13 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Artem Sokolov | 1 | 153 | 16.08 |
| Alodeep Sanyal | 2 | 59 | 8.66 |
| L. Darrell Whitley | 3 | 6631 | 968.30 |
| Yashwant K. Malaiya | 4 | 559 | 77.54 |