Name
Abstract | ||
|---|---|---|
We designed a cell-network-based video segmentation test-chip in 0.35μm CMOS technology including a power reduction technique which activates only boundary cells of currently grown regions. The effectiveness of the proposed technique is confirmed by measurement results for a 41×33-sized cell-network, with 23μsec segmentation time (avg.) and 45.8mW power-dissipation (avg.) at 10MHz clock frequency. |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1145/1120725.1120892 | Design Automation Conference, 2005. Proceedings of the ASP-DAC 2005. Asia and South Pacific |
Keywords | Field | DocType |
clock frequency,sec segmentation time,low-power video segmentation,proposed technique,boundary-active-only architecture,cell-network-based video segmentation test-chip,m cmos technology,power reduction technique,measurement result,boundary cell,power dissipation,chip,image segmentation,dissection,low power electronics,yield,opc | Architecture,Boundary cell,Computer science,Segmentation,CMOS,Electronic engineering,Real-time computing,Image segmentation,Clock rate,Low-power electronics | Conference |
Volume | ISSN | ISBN |
2 | 2153-6961 | 0-7803-8737-6 |
Citations | PageRank | References |
1 | 0.36 | 1 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Takashi Morimoto | 1 | 3 | 2.10 |
| Osamu Kiriyama | 2 | 10 | 2.43 |
| Hidekazu Adachi | 3 | 28 | 8.13 |
| Zhaomin Zhu | 4 | 81 | 2.50 |
| Tetsushi Koide | 5 | 126 | 36.29 |
| Hans Jürgen Mattausch | 6 | 96 | 32.93 |