Title | ||
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Realizing parallelism in database operations: insights from a massively multithreaded architecture |
Abstract | ||
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A new trend in processor design is increased on-chip support for multithreading in the form of both chip multiprocessors and simultaneous multithreading. Recent research in database systems has begun to explore increased thread-level parallelism made possible by these new multicore and multithreaded processors. The question of how best to use this new technology remains open, particularly as the number of cores per chip and threads per core increase. In this paper we use an existing massively multithreaded architecture, the Cray MTA-2, to explore the implications that a larger degree of on-chip multithreading may have for parallelism in database operations. We find that parallelism in database operations is easy to achieve on the MTA-2 and that, with little effort, parallelism can be made to scale linearly with the number of available processor cores. |
Year | DOI | Venue |
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2006 | 10.1145/1140402.1140408 | DaMoN |
Keywords | Field | DocType |
new multicore,realizing parallelism,on-chip multithreading,thread-level parallelism,available processor core,simultaneous multithreading,new technology,database system,new trend,database operation,multithreaded architecture,cray mta-2,oltp,chip,profile guided optimization,software optimization,itanium,thread level parallelism,cache coherency | Instruction-level parallelism,Multithreading,Computer science,Real-time computing,Temporal multithreading,Multi-core processor,Memory-level parallelism,Computer architecture,Task parallelism,Parallel computing,Simultaneous multithreading,Data parallelism,Database | Conference |
ISBN | Citations | PageRank |
1-59593-466-9 | 14 | 1.22 |
References | Authors | |
18 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
John Cieslewicz | 1 | 335 | 19.95 |
Jonathan Berry | 2 | 32 | 4.58 |
Bruce Hendrickson | 3 | 1669 | 214.08 |
Kenneth A. Ross | 4 | 4110 | 750.80 |