Title
An 8M Polygons/s 3-D Graphics SoC With Full Hardware Geometric and Rendering Engine for Mobile Applications
Abstract
A 3-D graphics SoC, with a multi-layer advanced microcontroller bus architecture (AMBA) system, full pipelined hardware 3-D graphics accelerator, and clock/power management is proposed as a 49-mm2 die for 180-nm CMOS technology. This system-on-chip (SoC) minimizes power consumption with a clock/power management unit according to its operation mode and applications. The 3-D graphics accelerator has a full pipelined architecture which improves full 3-D graphics performance to 8M polygons/s and consumes 108 mW at 100 MHz and 1.8 V. The LCD bypass mode and power-down mode consume 4.32 mW and 180 uW, respectively. The 3-D graphics accelerator also supports stereoscopic 3-D function with an alternative left-right drawing method and achieves a 59% improvement in 3DG performance compared to previous work.
Year
DOI
Venue
2011
10.1109/TVLSI.2010.2051568
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Keywords
Field
DocType
8m polygons,microcontrollers,3-d graphics (3dg) accelerator,power management,3-d graphics soc,computer graphic equipment,power consumption,lcd bypass mode,pipelined hardware 3d graphics accelerator,geometric engine,clock-power management unit,parallel architectures,stereoscopic 3d function,full hardware geometric,full 3-d graphics performance,low-power electronics,left-right drawing method,3d graphics soc,3dg system-on-chip (soc),rendering (computer graphics),voltage 1.8 v,system-on-chip,operation mode,cmos technology,die,full pipelined hardware,3-d display,power-down mode,full pipelined architecture,multilayer advanced microcontroller bus architecture system,3-d graphics,rendering engine,power 4.32 mw,3-d graphics accelerator,hardware geometry,liquid crystal displays,mobile computing,stereoscopic 3-d function,frequency 100 mhz,mobile applications,minimizes power consumption,system on chip,graphics hardware,energy management,technology management,power system,low power electronics,computer graphic
Graphics,Power management,System on a chip,Advanced Microcontroller Bus Architecture,Graphics hardware,Computer science,Electronic engineering,Rendering (computer graphics),Computer hardware,Power Management Unit,Embedded system,Low-power electronics
Journal
Volume
Issue
ISSN
19
8
1063-8210
Citations 
PageRank 
References 
2
0.37
2
Authors
7
Name
Order
Citations
PageRank
Jeonghun Kim1278.92
Hanjun Choi220.37
Sungyeal Yoon320.37
Taesik Bang420.37
Jong-chan Park5141.93
Chaehyun Jung620.37
Jason Cong77069515.06