Name
Title | ||
|---|---|---|
A Power and Area Efficient Maximum Likelihood Detector Implementation for High Throughput MIMO Systems |
Abstract | ||
|---|---|---|
A maximum likelihood detector (MLD) is presented for 4times4 QPSK multiple-input multiple-output (MIMO) systems. A hybrid methodology combining precomputation of norm values followed with the transformation of the maximum likelihood algorithm is applied in order to achieve an efficient MLD implementation, in which 16 norm values are concurrently computed for high throughput while maintaining power and area efficiency. The MLD implementation results are compared with a conventional MLD in area and power. Simulation results demonstrate that the proposed MLD can achieve up to 74 Mbps throughput at a clock speed of 147MHz |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/VLSID.2007.22 | VLSI Design |
Keywords | Field | DocType |
norm value,proposed mld,maximum likelihood algorithm,high throughput,area efficiency,conventional mld,area efficient maximum likelihood,maximum likelihood detector,mbps throughput,efficient mld implementation,mld implementation result,high throughput mimo systems,detector implementation,logic circuits,maximum likelihood,maximum likelihood estimation | Logic gate,Mimo systems,Precomputation,Computer science,MIMO,Real-time computing,Electronic engineering,Throughput,Maximum likelihood detector,Clock rate,Phase-shift keying | Conference |
ISSN | ISBN | Citations |
1063-9667 | 0-7695-2762-0 | 0 |
PageRank | References | Authors |
0.34 | 3 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| J. H. Han | 1 | 9 | 1.97 |
| A. T. Erdogan | 2 | 40 | 6.51 |
| Arslan, T. | 3 | 7 | 2.07 |