Name
Abstract | ||
|---|---|---|
This paper presents a technique for specifying change of control (e.g. branch) commands at a sequential processor's macroinstruction set level. It is shown that by representing high level language (HLL) control statements with special machine language instructions, the usual delays associated with control flow changes can be reduced. Preserving the HLL control flow information increases performance by reducing both the number of executed branches and pipeline breaks. |
Year | DOI | Venue |
|---|---|---|
1984 | 10.1145/800015.808173 | ISCA |
Keywords | Field | DocType |
virtual memory,heuristic search,control flow,high level language,ring network,np hard problems | Heuristic,Branch,Computer science,Virtual memory,Control flow,Parallel computing,Real-time computing,High-level programming language,Machine code,Control table,Ring network | Conference |
Volume | Issue | ISSN |
12 | 3 | 0163-5964 |
ISBN | Citations | PageRank |
0-8186-0538-3 | 7 | 1.34 |
References | Authors | |
5 | 2 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Robert G. Wedig | 1 | 58 | 18.81 |
| Marc A. Rose | 2 | 7 | 1.34 |