Name
Abstract | ||
|---|---|---|
As transistor size scales down, unavoidable process variations are rapidly increasing. Consequently, it's essential for designers to accurately estimate within-die and interdie variations so that circuits and integrated systems can operate correctly. This article describes an analysis of ring oscillators that were designed in 180-nm and 100-nm CMOS technologies, and discusses the oscillators' frequency variations as determined for different stage numbers and supply voltages. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/MDT.2010.57 | IEEE Design & Test of Computers |
Keywords | Field | DocType |
frequency variation,unavoidable process variation,integrated system,ring oscillator,interdie variation,100-nm cmos technology,supply voltage,transistor size scale,different stage number,measurement-based ring oscillator variation,transistors,transistor size,integrable system,cmos,cmos integrated circuits,variational analysis,process variation,cmos technology,oscillators | Ring oscillator,Oscillation,Computer science,Voltage,CMOS,Electronic engineering,Mosfet circuits,Integrated systems,Electronic circuit,Transistor,Electrical engineering | Journal |
Volume | Issue | ISSN |
27 | 5 | 0740-7475 |
Citations | PageRank | References |
5 | 0.50 | 1 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Koh Johguchi | 1 | 43 | 7.87 |
| Akihiro Kaya | 2 | 5 | 0.84 |
| Shinya Izumi | 3 | 5 | 0.84 |
| Hans Jürgen Mattausch | 4 | 96 | 32.93 |
| Tetsushi Koide | 5 | 126 | 36.29 |
| Norio Sadachika | 6 | 5 | 2.87 |