Name
Abstract | ||
|---|---|---|
This paper proposes the fuse, a technique to anticipate failures due to degradation in any ALU (Arithmetic Logic Unit), and particularly in an adder. The fuse consists of a replica of the weakest transistor in the adder and the circuitry required to measure its degradation. By mimicking the behavior of the replicated transistor the fuse anticipates the failure short before the first failure in the adder appears, and hence, data corruption and program crashes can be avoided. Our results show that the fuse anticipates the failure in more than 99.9% of the cases after 96.6% of the lifetime, even for pessimistic random within-die variations. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/IOLTS.2007.34 | IOLTS |
Keywords | Field | DocType |
arithmetic logic unit,data corruption,program crash,anticipate failures,pessimistic random within-die variation,weakest transistor,adders,degradation,hardware,logic design,temperature,fuse,fuses,transistors,circuits | Logic synthesis,Replica,Adder,Computer science,Arithmetic logic unit,Real-time computing,Electronic engineering,Data Corruption,Electronic circuit,Fuse (electrical),Transistor,Embedded system | Conference |
ISSN | ISBN | Citations |
1942-9398 | 0-7695-2918-6 | 3 |
PageRank | References | Authors |
0.39 | 12 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jaume Abella | 1 | 1046 | 76.34 |
| Xavier Vera | 2 | 552 | 30.31 |
| Osman Unsal | 3 | 164 | 14.33 |
| Oguz Ergin | 4 | 424 | 25.84 |
| Antonio González | 5 | 3178 | 229.66 |