Name
Abstract | ||
|---|---|---|
This paper presents two power-saving designs for Quadratic Polynomial Permutation (QPP) interleave address generator of which interleave length K is fixed and unfixed, respectively. These designs are based on our observation that the quadratic term f(2)x(2)%K of f(x) = (f(1)x + f(2)x(2))%K, which is the QPP address generating function, has a short period and is symmetric within the period. Power consumption is reduced by 27.4% in the design with fixed-K and 5.4% in the design with unfixed-K on the average for various values of K, when compared with existing designs. |
Year | DOI | Venue |
|---|---|---|
2009 | 10.1587/transfun.E92.A.1538 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | DocType | Volume |
QPP, interleaver, low power design, turbo decoder, address generator | Journal | E92A |
Issue | ISSN | Citations |
6 | 1745-1337 | 0 |
PageRank | References | Authors |
0.34 | 3 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Won-ho Lee | 1 | 7 | 3.53 |
| Chong Suck Rim | 2 | 0 | 0.34 |