Abstract | ||
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In this work, we develop an electronic system-level (ESL) power estimation framework which uses the specified power model interface. Using the proposed power model interface we can easily integrate the various power models in ESL virtual platform. Designers can choose either the coarse-grained or fine-grained power models according to the trade-off between accuracy and computing cost. The experimental results show the proposed method can accurate estimate the system power trend immediately compared with traditional method. We also demonstrated the capability of system power and performance analysis in both hardware-view and software-view by using our approach at ESL. Meanwhile, it can be used for high level architecture exploration directly. |
Year | DOI | Venue |
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2010 | 10.1109/ASPDAC.2010.5419777 | ASP-DAC |
Keywords | Field | DocType |
fine-grained power model,system power,power aware computing,system power trend,parallel architectures,high level architecture exploration,pac duo system power,power model interface,traditional method,esl virtual platform,specified power model interface,fine-grained power models,electronic system-level power estimation,proposed power model interface,coarse-grained power models,power estimation framework,various power model,pac duo system power estimation,parallel architecture core duo system,estimation,accuracy,image recognition,computational modeling,electronic system level,soc,decoding | Computer science,Virtual platform,Car navigation systems,Electronic engineering,Real-time computing,Power model,Decoding methods,High-level architecture | Conference |
ISSN | ISBN | Citations |
2153-6961 | 978-1-4244-5767-0 | 4 |
PageRank | References | Authors |
0.56 | 7 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Wen-Tsan Hsieh | 1 | 27 | 3.40 |
Jen-Chieh Yeh | 2 | 223 | 21.72 |
Shi-Yu Huang | 3 | 766 | 70.53 |