Name
Title | ||
|---|---|---|
Reconfigurable Circuit Design Based On Arithmetic Logic Unit Using Double-Gate Cntfets |
Abstract | ||
|---|---|---|
This letter describes a design methodology for an arithmetic logic unit (ALU) incorporating reconfigurability based on double-gate carbon nanotube field-effect transistors (DG-CNTFETs). The design of a DG-CNTFET with an ambipolar-property-based reconfigurable static logic circuit is simple and straightforward using an ambipolar binary decision diagram (Am-BDD), which represents the cornerstone for the automatic pass transistor logic (PTL) synthesis flows of ambipolar devices. In this work, an ALU with 16 functions is synthesized by the design methodology of a DG-CNTFET-based reconfigurable static logic circuit. Furthermore, it is shown that the proposed ALU is much more flexible and practical than a conventional DG-CNTFET-based reconfigurable ALU. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1587/transfun.E97.A.675 | IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES |
Keywords | Field | DocType |
reconfigurable logic circuit design, ambipolar device, double-gate CNTFET, binary decision diagram, arithmetic logic unit | Logic synthesis,Logic gate,Computer architecture,Pass transistor logic,Computer science,Logic optimization,Arithmetic logic unit,Circuit design,Electronic engineering,Theoretical computer science,Logic family,Programmable logic device | Journal |
Volume | Issue | ISSN |
E97A | 2 | 0916-8508 |
Citations | PageRank | References |
0 | 0.34 | 6 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hiroshi Ninomiya | 1 | 7 | 5.20 |
| Manabu Kobayashi | 2 | 11 | 7.44 |
| Yasuyuki Miura | 3 | 6 | 5.77 |
| Shigeyoshi Watanabe | 4 | 15 | 7.42 |