Name
Abstract | ||
|---|---|---|
In this paper, the space-time mapping of the dependency matrix of an algorithm is used to study spatial properties of a systolic array implementation of a 3-nested loop structure. Elementary expressions are developed for both the number of processing elements and the area of the array. These expressions involve only the space-time transformation and the lengths of the loops. As well, characterizations have been found for the form of the space-time transformation which produces a systolic array with the minimum number of processing elements, and one which has both the minimum number of processing elements and the smallest area. Moreover, the theorems can be also being applied to more general algorithms, such as variable length of loops. |
Year | DOI | Venue |
|---|---|---|
2000 | 10.1109/82.933810 | IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing |
Keywords | Field | DocType |
systolic array,general algorithm,dependency matrix,space-time transformation,space considerations,systolic array implementation,3-nested loop structure,minimum number,elementary expression,smallest area,vlsi systolic array mappings,space-time mapping,generic algorithm,space time,fabrication,very large scale integration,computer science,statistics,parallel algorithms,mathematics,vlsi,nested loops | MISD,Expression (mathematics),Computer science,Matrix (mathematics),Parallel algorithm,Systolic array,Theoretical computer science,Computational science,Processing element,Design structure matrix,Very-large-scale integration,Distributed computing | Conference |
Volume | Issue | ISSN |
48 | 4 | 1521-9097 |
ISBN | Citations | PageRank |
0-7695-0568-6 | 1 | 0.38 |
References | Authors | |
7 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| J. H. Weston | 1 | 6 | 1.39 |
| C. N. Zhang | 2 | 28 | 6.89 |
| Hua Li | 3 | 358 | 75.80 |