Title | ||
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A bandwidth efficient subsampling-based block matching architecture for motion estimation |
Abstract | ||
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We have developed a new pel subsampling-based search hardware for motion estimation called quartet-pel motion estimation (QME). The memory access of search range memory can be reduced to 25%. The computational complexity can also be reduced to 25% with respect to full-search block matching algorithm (FBMA). On the other hand, flexible and efficient hardware architecture is also implemented. The flexibility is based on the configuration of processing unit, and adjustable candidate number. In addition, complete verification and testing methods are also considered. |
Year | DOI | Venue |
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2005 | 10.1145/1120725.1120889 | ASP-DAC |
Keywords | Field | DocType |
quartet-pel motion estimation,matching algorithm,new pel subsampling-based search,efficient hardware architecture,complete verification,motion estimation,bandwidth efficient subsampling-based block,memory access,computational complexity,adjustable candidate number,search range memory,formal verification,hardware architecture,dissection,opc,test methods,yield | Bandwidth efficient,Block-matching algorithm,Architecture,Computer science,Image matching,Real-time computing,Motion estimation,Formal verification,Computational complexity theory,Hardware architecture | Conference |
ISSN | ISBN | Citations |
2153-6961 | 0-7803-8737-6 | 4 |
PageRank | References | Authors |
0.69 | 6 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Hao-Yun Chin | 1 | 15 | 2.07 |
Chao-Chung Cheng | 2 | 280 | 22.04 |
Yu-Kun Lin | 3 | 119 | 11.84 |
Tian-Sheuan Chang | 4 | 712 | 69.10 |