Title
High-speed systolic architectures for finite field inversion
Abstract
Using a new reformulation of the extended Euclidean algorithm, we propose new two-dimensional systolic architectures for inversion in GF(2m). Our new architectures require considerably less hardware in comparison to the architectures we proposed recently, while achieving the same critical path delays, latencies, and throughputs. Our new architectures compare even more favorably to the inversion architectures proposed previously by others. In common with much previous work in this area, one of our new architectures uses a centralized control mechanism. The other new architecture proposed in this paper uses a distributed control mechanism which results in all the cells in our architecture having the same circuitry regardless of the value of m. Hence the latter new architecture has excellent scalability properties.
Year
DOI
Venue
2005
10.1016/j.vlsi.2004.07.006
Integration
Keywords
Field
DocType
galois field,latter new architecture,finite field arithmetic,critical path delay,excellent scalability property,high-speed systolic architecture,cryptography,inversion architecture,extended euclidean algorithm,control mechanism,finite field inversion,new architecture,new two-dimensional systolic architecture,new reformulation,centralized control mechanism,euclidean algorithm,finite field,critical path
Finite field,Inversion (meteorology),Computer science,Parallel computing,Extended Euclidean algorithm,Circuit design,Algorithm,Electronic engineering,Finite field arithmetic,Critical path method,Galois theory,Scalability
Journal
Volume
Issue
ISSN
38
3
Integration, the VLSI Journal
Citations 
PageRank 
References 
13
0.99
4
Authors
3
Name
Order
Citations
PageRank
Z. Yan1172.20
D. V. Sarwate2431121.44
Z. Liu3131.66