Abstract | ||
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Evaluation and refinement of system models often require modifications in the model that follow concrete rules. In this work, a method for a flexible automation of such transformation steps will be presented. It allows savings in development time and reduces the error proneness. Therefore, a tool for rule based manipulation of VHDL design descriptions has been extended to enable its use with system models in C++ and SystemC. An automotive electronics application, the integration of SystemC modules into a MATLAB/Simulink simulation by automatic wrapper generation, will show its use in the design process. |
Year | DOI | Venue |
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2009 | 10.1007/978-3-642-04284-3_21 | ANALYSIS, ARCHITECTURES AND MODELLING OF EMBEDDED SYSTEMS |
Keywords | Field | DocType |
rule based,system modeling,design process | Automotive electronics,Rule-based system,MATLAB,Computer science,Abstract syntax tree,Automation,SystemC,Engineering design process,VHDL,Embedded system | Conference |
Volume | ISSN | Citations |
310 | 1868-4238 | 1 |
PageRank | References | Authors |
0.60 | 3 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Ralph Görgen | 1 | 5 | 3.41 |
Jan-Hendrik Oetjens | 2 | 25 | 4.83 |
Jan B. Freuer | 3 | 4 | 1.37 |
Wolfgang Nebel | 4 | 484 | 76.22 |