Name
Title | ||
|---|---|---|
Performance evaluation and optimization of random memory access on multicores with high productivity. |
Year | DOI | Venue |
|---|---|---|
2010 | 10.1109/HIPC.2010.5713168 | HiPC |
Keywords | Field | DocType |
instruction sets,benchmark testing,optimization,cell,random access,sequential access,computer architecture | Computer architecture,Uniform memory access,CUDA,Instruction set,Computer science,Parallel computing,Multi-core processor,Memory architecture,Benchmark (computing),Distributed computing,Random access,Sequential access | Conference |
Citations | PageRank | References |
7 | 0.56 | 3 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Vaibhav Saxena | 1 | 31 | 4.89 |
| Yogish Sabharwal | 2 | 404 | 43.02 |
| Pramod Bhatotia | 3 | 414 | 28.94 |