Name
Abstract | ||
|---|---|---|
This paper compares various contemporary multicore-based microprocessor architectures from different vendors with different memory interconnects regarding performance, speedup, and parallel efficiency. Sparse matrix decomposition is used as a benchmark application. The example matrix used in the experiments comes from an electrical engineering application, where numerical simulation of physical processes plays an important role in the design of industrial products.Within this context, thread-to-core pinning and cache optimization are two important aspects which are investigated in more detail. |
Year | DOI | Venue |
|---|---|---|
2011 | 10.1007/s11227-010-0428-9 | The Journal of Supercomputing |
Keywords | Field | DocType |
Multicore,Pinning,Cache optimization,Performance optimization,Sparse matrices | Industrial production,Computer simulation,Matrix (mathematics),Computer science,Microprocessor,Parallel computing,Multi-core processor,Sparse matrix,Speedup,Distributed computing,Cache optimization | Journal |
Volume | Issue | ISSN |
57 | 2 | 0920-8542 |
Citations | PageRank | References |
1 | 0.38 | 2 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Carsten Trinitis | 1 | 151 | 29.80 |
| Tilman Küstner | 2 | 5 | 2.51 |
| Josef Weidendorfer | 3 | 115 | 17.98 |
| Jasmin Smajic | 4 | 7 | 2.13 |