Title
A 14 bit 200 MS/s DAC With SFDR > 78 dBc, IM3 < - 83 dBc and NSD < - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping.
Abstract
This paper presents a 14 bit 200 MS/s current-steering DAC with a novel digital calibration technique called dynamic-mismatch mapping (DMM). By optimizing the switching sequence of current cells to reduce the dynamic integral nonlinearity in an I-Q domain, the DMM technique digitally calibrates all mismatch errors so that both the DAC static and dynamic performance can be significantly improved in...
Year
DOI
Venue
2011
10.1109/JSSC.2011.2126410
IEEE Journal of Solid-State Circuits
Keywords
Field
DocType
Timing,Switches,Linearity,Frequency domain analysis,Calibration,Frequency modulation,Transfer functions
Integral nonlinearity,Noise floor,Computer science,Control theory,Linearity,Electronic engineering,Spurious-free dynamic range,CMOS,dBc,Frequency modulation,Distortion
Journal
Volume
Issue
ISSN
46
6
0018-9200
Citations 
PageRank 
References 
24
1.66
6
Authors
7
Name
Order
Citations
PageRank
Yongjian Tang1375.04
Joost Briaire2536.12
Kostas Doris39911.53
Robert H. M. van Veldhoven47613.13
Pieter C. W. van Beek5241.66
Hans Hegt610117.59
Arthur H. M. van Roermund737967.62