Name
Abstract | ||
|---|---|---|
This paper analyses the stability of the synchronized state in Cartesian networks of identical all-digital phase-locked loops (ADPLLs) for clock distribution applications. Such networks consist in Cartesian grids of digitally-controlled oscillator nodes, where each node communicates only with its nearest neighbors. Under certain conditions, we show that the whole network may synchronize both in ph... |
Year | DOI | Venue |
|---|---|---|
2012 | 10.1109/TCSI.2011.2169745 | IEEE Transactions on Circuits and Systems I: Regular Papers |
Keywords | Field | DocType |
Synchronization,Stability analysis,Circuit stability,Phase locked loops,Clocks,Equations,Mathematical model | Phase-locked loop,Synchronization,Digital electronics,Digital filter,Control theory,Electronic engineering,Exponential stability,Clock synchronization,Mathematics,Local oscillator,Cartesian coordinate system | Journal |
Volume | Issue | ISSN |
59 | 4 | 1549-8328 |
Citations | PageRank | References |
11 | 1.27 | 11 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jean-Michel Akre | 1 | 14 | 1.78 |
| Jérôme Juillard | 2 | 59 | 7.67 |
| Dimitri Galayko | 3 | 81 | 26.41 |
| Éric Colinet | 4 | 25 | 6.22 |