Name
Abstract | ||
|---|---|---|
This paper presents a cost-effective approach to implement a long instruction word microprocessor. The proposed approach achieves the goal of optimal performance/cost tradeoff by selectively, instead of unconditionally, duplicating the hardware resources in a uniprocessor. A hardware resource is duplicated only if the performance improvement gained by doing so can justify the cost incurred. In accordance with this guideline, a long instruction word microprocessor architecture called the MPA architecture is proposed. The MPA architecture has two parallel execution units and, with a minimal increase of hardware cost, delivers a performance significantly higher than that of a RISC (Reduced Instruction Set Computer) uniprocessor, more than 50% higher in average for the five benchmark programs used in this sutdy. On the other hand, a long instruction word microprocessor with everything duplicated delivers a performance just slightly higher than that of the MPA architecture, less than 1% higher in average for the same five benchmark programs, but the cost incurred is a lot higher. |
Year | DOI | Venue |
|---|---|---|
1990 | 10.1145/379126.379134 | ACM SIGARCH Computer Architecture News |
Keywords | DocType | Volume |
cost-effective approach,performance improvement,hardware resource,long instruction word microprocessor,cost tradeoff,benchmark program,hardware cost,mpa architecture,long instruction word microprrocessor,optimal performance,cost effectiveness | Journal | 18 |
Issue | Citations | PageRank |
1 | 1 | 0.39 |
References | Authors | |
5 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yen-Jen Oyang | 1 | 423 | 48.82 |
| Bor-Ting Chang | 2 | 1 | 0.39 |
| Shu-may Lin | 3 | 2 | 1.10 |