Title
High-Psr Bias Circuitry For Ntsc Sync Separation
Abstract
This paper presents a simple and novel bias generation circuitry (BGC) with temperature compensation. The proposed BGC utilizes step-down regulators and a bandgap-based bias with cascode current control. The clamping voltages required for sync separation from an NTSC signal are generated. Detailed PSR (power rejection ratio) analysis of the proposed BGC is also derived to circumscribe the clamping voltage variation. The worst variation of the proposed design verified by HSPICE post-layout simulations is 4.2% given a [-50degreesC, +150degreesC] temperature range, and a VDD(=5V)+10%.
Year
DOI
Venue
2004
10.1109/ISCAS.2004.1328198
2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 1, PROCEEDINGS
Keywords
Field
DocType
NTSC signal, clamping levels, PSR, bandgap bias, sync separation
Clamping,NTSC,Atmospheric temperature range,Spice,Computer science,Voltage,Electronic engineering,Cascade,sync,Electrical engineering,Voltage regulator
Conference
Citations 
PageRank 
References 
0
0.34
0
Authors
4
Name
Order
Citations
PageRank
Chua-chin Wang1474107.39
Yih-Long Tseng2467.68
Tzung-Je Lee33212.51
Ron Hu45710.76