Name
Abstract | ||
|---|---|---|
This paper provides a survey of state-of-the-art hardware architectures for image and video coding. Fundamental design issues are discussed with particular emphasis on efficient dedicated implementation. Hardware architectures for MPEG-4 video coding and JPEG 2000 still image coding are reviewed as design examples, and special approaches exploited to improve efficiency are identified. Further pers... |
Year | DOI | Venue |
|---|---|---|
2005 | 10.1109/JPROC.2004.839622 | Proceedings of the IEEE |
Keywords | Field | DocType |
Hardware,Video coding,Computer architecture,MPEG 4 Standard,Image coding,Very large scale integration,Transform coding,Videoconference,ISO standards,IEC standards | Digital signal processor,Computer science,Image processing,Coding (social sciences),JPEG 2000,Computer hardware,Very-large-scale integration,MPEG-4,Image compression,Hardware architecture | Journal |
Volume | Issue | ISSN |
93 | 1 | 0018-9219 |
Citations | PageRank | References |
37 | 2.04 | 57 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Po-chih Tseng | 1 | 323 | 30.24 |
| Yung-chi Chang | 2 | 94 | 11.58 |
| Yu-Wen Huang | 3 | 1116 | 114.02 |
| Hung-Chi Fang | 4 | 210 | 36.13 |
| Chao-tsung Huang | 5 | 440 | 38.76 |
| Liang-Gee Chen | 6 | 3637 | 383.22 |