Title
Context-Aware Address Translation For High Performance Smp Cluster System
Abstract
User-level communication allows an application process to access the network interface directly. Bypassing the kernel requires that a user process accesses the network interface using its own virtual address which should be translated to a physical address. A small caching structure which is similar to the hardware TLB on the host processor has been used to cache the mappings between virtual and physical addresses on the network interface memory.In this study, we propose a new TLB architecture for the network interface. The proposed architecture splits an original caching structure into as many partitions as the number of processors on the SMP system and assigns a separate partition to each application process. In addition, the architecture becomes aware of user contexts and switches the content of caching structure in accordance with context switching. According to our experiments, our scheme achieves significant reduction in application execution time compared to the previous approach.
Year
DOI
Venue
2008
10.1109/CLUSTR.2008.4663784
2008 IEEE INTERNATIONAL CONFERENCE ON CLUSTER COMPUTING
Keywords
Field
DocType
network interface,ubiquitous computing,kernel,communication protocol,indexes,computer architecture,switches,protocols,memory management,network interfaces
Computer architecture,Physical address,Computer science,Cache,Parallel computing,Virtual address space,Memory management,Ubiquitous computing,Translation lookaside buffer,Context switch,Network interface
Conference
ISSN
Citations 
PageRank 
1552-5244
0
0.34
References 
Authors
10
3
Name
Order
Citations
PageRank
Moon-Sang Lee171.53
Joonwon Lee2143890.35
Seungryoul Maeng373047.58