Title
Evaluation of a hardware transactional memory model in an NoC-based embedded MPSoC
Abstract
Transactional memories have emerged in the last years as a new solution for synchronization on shared memory multiprocessors helping to exploit the parallelism of applications while overcoming limitations of the lock mechanism. This paper presents the performance and energy evaluation of a hardware transactional memory (HTM) solution in an NoC-based MPSoC environment, comparing it to a traditional shared memory model that uses locks to provide consistency. Experiments show that transactional memory is a promising alternative to locks for future NoC-based embedded systems, resulting in performance gains up to 30% and energy savings up to 32%, depending on the application and on the architecture configuration.
Year
DOI
Venue
2010
10.1145/1854153.1854177
SBCCI
Keywords
Field
DocType
traditional shared memory model,noc-based mpsoc environment,hardware transactional memory,future noc-based embedded system,energy evaluation,transactional memory,hardware transactional memory model,energy saving,new solution,shared memory,performance gain,noc-based embedded mpsoc,noc,embedded system,embedded systems,hardware
Computer architecture,Interleaved memory,Uniform memory access,Shared memory,Computer science,Distributed memory,Cache-only memory architecture,Transactional memory,Real-time computing,Memory management,Distributed shared memory
Conference
Citations 
PageRank 
References 
5
0.48
14
Authors
3
Name
Order
Citations
PageRank
Leonardo Kunz150.48
Gustavo Girão2264.10
Flávio R. Wagner310611.88