Name
Title | ||
|---|---|---|
A 0.8-V 250-Msample/S Double-Sampled Inverse-Flip-Around Sample-And-Hold Circuit Based On Switched-Opamp Architecture |
Abstract | ||
|---|---|---|
This paper proposes a low-voltage high-speed sample-and-hold (S/H) structure with excellent power efficiency. Based on the switched-opamp technique, an inverse-flip-around architecture which maximizes the feedback factor is employed in the proposed S/H. A skew- insensitive double-sampling mechanism is presented to increase the throughput by a factor of two while eliminating the timing mismatch associated with double-sampling circuits. Furthermore, a dual-input dual-output opamp is proposed to incorporate double-sampling into the switched-opamp based S/H. This opamp also removes the memory effect in double-sampling circuitry and features fast turn-on time to improve the speed performance in switched-opamp circuits. Simulation results using a 0.13-mu m CMOS process model demonstrates the proposed S/H circuit has a total -harmonic-distortion of -67.3 dB up to 250 MSample/s and a 0.8 Vpp input range at 0.8 V supply. The power consumption is 3.5 mW and the figure-of-merit is only 7.4 fJ/step. |
Year | DOI | Venue |
|---|---|---|
2008 | 10.1093/ietele/e91-c.9.1480 | IEICE TRANSACTIONS ON ELECTRONICS |
Keywords | DocType | Volume |
switched-opamp, low-voltage, high-speed, sample-and-hold, double-sampling | Journal | E91C |
Issue | ISSN | Citations |
9 | 1745-1353 | 2 |
PageRank | References | Authors |
0.49 | 5 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hsin-hung Ou | 1 | 7 | 1.85 |
| Bin-da Liu | 2 | 563 | 66.56 |
| Soon-Jyh Chang | 3 | 655 | 73.67 |