Title
Design fault injection-based technique and tool for FPGA projects verification
Abstract
Design fault injection-based technique (DBIT) is proposed to implement a procedure of independent verification. The possible options of the proposed DBIT application are presented. The developed design fault profiling and injection tool is described. It is given an example of fault profiling and injection carrying out by the developed tool.
Year
DOI
Venue
2011
10.1109/EWDTS.2011.6116608
EWDTS
Keywords
Field
DocType
fpga projects verification,independent verification,proposed dbit application,injection tool,fault profiling,design fault injection-based technique,possible option,developed design fault profiling,developed tool,fault tolerant system,fault tolerance,fault tolerant,field programmable gate array,graphical user interfaces,graphic user interface,field programmable gate arrays
Computer science,Profiling (computer programming),Field-programmable gate array,Fault tolerance,Graphical user interface,Fault injection,Embedded system
Conference
Citations 
PageRank 
References 
0
0.34
3
Authors
3
Name
Order
Citations
PageRank
L. Reva120.92
V. Kulanov200.34
Vyacheslav Kharchenko311325.59