Name
Abstract | ||
|---|---|---|
FPGA-based configurable computing machines are evolving rapidly in large signal processing applications due to flexibility and high performance. In this paper, given a reconfigurable processing unit (RPU) with a logic capacity of ARPU and a computational task represented by a data flow graph G = (V, E, W), we propose a network flow-based multiway task partitioning algorithm to minimize communication costs for temporal partitioning. The proposed algorithm obtains an optimal solution with minimum interconnection under area constraints. The optimal solution is a cut set. In our approach, two techniques are applied. In the initial partition, any feasible min-cut is produced by the proposed network flow-based algorithm, so a set of feasible min-cuts is obtained. From the feasible solutions, the scheduling technique selects an optimal global solution. |
Year | DOI | Venue |
|---|---|---|
2007 | 10.1109/TVLSI.2007.909806 | IEEE Trans. VLSI Syst. |
Keywords | Field | DocType |
data flow graph,field programmable gate arrays,signal processing,field programmable gate array,set theory,reconfigurable computing,cut set,network flow,scheduling | Cut,Flow network,Signal processing,Computer science,Scheduling (computing),Parallel computing,Field-programmable gate array,Data-flow analysis,Real-time computing,Electronic engineering,Reconfigurable computing,Data flow diagram | Journal |
Volume | Issue | ISSN |
15 | 12 | 1063-8210 |
Citations | PageRank | References |
20 | 0.96 | 18 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Yung-Chuan Jiang | 1 | 44 | 3.05 |
| Jhing-fa Wang | 2 | 982 | 114.31 |