Title
Power profiling-guided floorplanner for 3D multi-processor systems-on-chip.
Abstract
Three-dimensional (3D) integration has become one of the most promising techniques for the development of future multi-core processors, since it improves performance and reduces power consumption by decreasing global wire length. However, 3D integration causes serious thermal problems because the closer proximity of heat generating dies makes existing thermal hotspots more severe. Thermal-aware fl...
Year
DOI
Venue
2012
10.1049/iet-cds.2011.0350
IET Circuits, Devices & Systems
Keywords
Field
DocType
microprocessor chips,system-on-chip,thermal management (packaging),three-dimensional integrated circuits
Multi processor,Profiling (computer programming),Electronic engineering,Dynamic demand,Three dimensional integration,Mathematics,Power consumption,Embedded system
Journal
Volume
Issue
ISSN
6
5
1751-858X
Citations 
PageRank 
References 
0
0.34
17
Authors
4
Name
Order
Citations
PageRank
Ignacio Arnaldo1817.69
José Luis Risco-Martín2547.71
José Luis Ayala363.55
Jose Ignacio Hidalgo413522.61