Title
An ESL approach for energy consumption analysis of cache memories in SoC platforms
Abstract
The design of complex circuits as SoCs presents two great challenges to designers. One is the speeding up of system functionality modeling and the second is the implementation of the system in an architecture that meets performance and power consumption requirements. Thus, developing new high-level specification mechanisms for the reduction of the design effort with automatic architecture exploration is a necessity. This paper proposes an Electronic-System-Level (ESL) approach for system modeling and cache energy consumption analysis of SoCs called PCacheEnergy Analyzer. It uses as entry a high-level UML-2.0 profile model of the system and it generates a simulation model of a multicore platform that can be analyzed for cache tuning. PCacheEnergyAnalyzer performs static/dynamic energy consumption analysis of caches on platforms that may have different processors. Architecture exploration is achieved by letting designers choose different processors for platform generation and different mechanisms for cache optimization. PCacheEnergy Analyzer has been validated with several applications of Mibench, Mediabench, and PowerStone benchmarks, and results show that it provides analysis with reduced simulation effort
Year
DOI
Venue
2011
10.1155/2011/219497
Int. J. Reconfig. Comp.
Keywords
Field
DocType
system modeling,pcacheenergy analyzer,cache memory,architecture exploration,cache tuning,soc platform,cache optimization,esl approach,automatic architecture exploration,system functionality modeling,different processor,cache energy consumption analysis,different mechanism
Computer science,Cache,Real-time computing,Multi-core processor,Computer architecture,Architecture,Parallel computing,Cache algorithms,Systems modeling,Electronic circuit,Spectrum analyzer,Energy consumption,Embedded system
Journal
Volume
Citations 
PageRank 
2011,
2
0.40
References 
Authors
18
7